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Samsung (Memory) SAMSUNG S5PC110/S5PV210
  • 作者:
  • 來源:
  • 日期 : 2018-08-06

S5PC110/S5PV210相當(dāng)適合在著重多媒體應(yīng)用的手持式系統(tǒng), 如 TabletPC, Smartphone 等等, 本產(chǎn)品為45nm低功耗制程, 其低功耗的優(yōu)勢能加長于電池供電使用的時間, 不同于同級競爭產(chǎn)品, S5PC110/S5PV210 內(nèi)建 512KB L2 cache, 及1080P H.264 Encode/Decode. (競爭對手僅有256KB, 720P H.264 Encode/Decode), 目前已量產(chǎn)之CPU頻率為 800MHz 及 1GHz, 對外部RAM的傳遞效能, 最快達到 3.2GByte/sec, 能有效并平順的展現(xiàn)網(wǎng)頁瀏覽及華麗的使用接口.
S5PC110/S5PV210 內(nèi)建之 Multi Format Codec (MFC) 支援 MP4, H.264, H.263 影像壓解碼, 及 MPEG2, VC1 與 Xvid 影像解碼, 并支援 NTSC/PAL 的 Analog TV out 及 720P/1080P HDMI.
ROM及RAM則可以支援 LPDDR1 (mobile DDR), LPDDR2, or DDR2. Flash/ROM Port 支援 NAND Flash, NOR Flash, OneNAND, SRAM 及其他各式 ROM 型式的記憶周邊.

為了減少整個系統(tǒng)設(shè)計的成本, S5PC110/S5PV210 內(nèi)建許多周邊接口, 包含 TFT 24-bit true color LCD controller, Camera Interface, MIPI DSI, MIPI CSI-2, System Manager for power management, ATA interface, four UARTs, 24-channel DMA, four Timers, General I/O Ports, three IIS, S/PDIF, three IIC-BUS interface, two HS-SPI, four SD Host and high-speed Multimedia Card interface, USB Host 2.0 and USB Device 2.0 operating at high speed (480Mbps) with USB 2.0 PHY respectively, 及四個 PLLs for clock generation. POP (Package on Package) 整合 MCP, 減少 PCB 空間及高速DRAM系統(tǒng)設(shè)計的困擾.

Features
 ARM CortexA8 based CPU Subsystem with NEON? - 32/32KB I/D Cache, 512KB L2 Cache? - 800MHz/1GHz Operating Frequency at 1.2 V and 1.25 V respectively
 64-bit Multi-layer bus architecture

 Advanced power management for mobile applications

 64KB ROM for secure booting and 96KB RAM for security function
 8-bit ITU 601/656 Camera Interface supports horizontal size up to 4224pixels for scaled and 8192 pixels for un-scaled resolution
 Multi Format CODEC provides encoding and decoding of MPEG-4/H.263/H.264 up to 1080p@30fps and decoding of MPEG2/VC1/Xvid video up to 1080p@30fps
 JPEG codec support up to 80Mpixels/s
 3D Graphics Acceleration with Programmable Shader up to 20M triangles/s, 1000Mpixels/s
 Dedicated 2D Graphics acceleration supporting BitBLT, Alpha-blending, and Stretch function
 1/2/4/8 bpp palletized or 8/16/24bpp non-palletized Color-TFT, up to SXGA resolution
 Composite TV-out interface with video amplifier and HDMI 1.3 interface
 4-lane MIPI-DSI and MIPI-CSI interface
 One AC-97 audio codec interface and three PCMs serial audio interface
 Three 24-bit IISs interface
 One TX only S/PDIF interface support for digital audio
 Three IICs interface support
 Two high speed SPIs
 Four UARTs up to 3Mbps port for Bluetooth 2.0
 On-chip USB 2.0 Device supporting FS/HS (12Mbps/480Mbps, on-chip transceiver)
 On-chip USB 2.0 Host supporting LS/FS/HS (1.5Mbps/12Mbps/480Mbps, on-chip transceiver)
 Asynchronous Modem Interface support including 16KB DPSRAM
 Four SD/SDIO/HS-MMC interface supporting SD Host 2.0, HS-MMC 4.3, SD Card 2.0, SDIO 1.0
 ATA/ATAPI-6 compatible interface support
 24-channel DMA controller (8 channels for memory-to-memory DMA, 16 channels for Peripheral DMA)
 Support 14x8 key matrix
 10-channel, 12-bit multiplexed ADC
 Configurable GPIOs
 Real time clock, PLL, timer with PWM and watch dog timer
 Memory Subsystem? - Asynchronous SRAM / ROM / NOR Interface with x8 or x16 data bus? - NAND interface with x8 data bus? - Muxed/Demuxed OneNAND Interface with x16 data bus? - LPDDR1 interface with x16 or x32 data bus (266 ~ 400Mbps/pin DDR)? - DDR2 interface with x16 or x32 data bus (400Mbps/pin DDR)? - LPDDR2 interface (400Mbps/pin DDR)

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